Title :
Very low charge injection switched-current memory cell
Author :
Leelavattananon, Kritsapon ; Hughes, John B. ; Toumazou, Chris
Author_Institution :
Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK
Abstract :
A new switched-current memory cell is proposed which achieves very low charge injection errors. The technique virtually eliminates the signal-dependent error, leaving only an offset which is cancelled using either dummy switches or a fully differential configuration. The improved memory cell was designed using a standard 3.3 V, 0.8 μm CMOS digital process. Simulation results demonstrate that the signal-dependent charge injection error is lowered by as much as two orders of magnitude
Keywords :
CMOS analogue integrated circuits; active networks; analogue storage; sampled data circuits; switched current circuits; 0.8 micron; 3.3 V; CMOS; charge injection errors; dummy switches; fully differential configuration; offset; signal-dependent error; switched-current memory cell; Bandwidth; CMOS process; Capacitors; Circuits; Earth; Laboratories; Operational amplifiers; Switches; Transconductance; Zero voltage switching;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704532
