Title :
Development of a 4-layer low cost flip chip packaging technology
Author :
Govind, Anand ; Ghahghahi, Farshad
Author_Institution :
LSI Logic Corp.
Keywords :
Bonding; Costs; Dielectric substrates; Flip chip; Large scale integration; Packaging; Qualifications; Routing; Silicon; Wire;
Conference_Titel :
Electronic Components and Technology Conference, 2003. Proceedings. 53rd
Print_ISBN :
0-7803-7791-5
DOI :
10.1109/ECTC.2003.1216337
