Title :
Non-idealities in linear CDR phase detectors
Author :
Cao, Jun ; Huang, Sui ; Green, Michael M.
Author_Institution :
Broadcom Corp., Irvine, CA, USA
Abstract :
The effects of circuit non-idealities in a “Hogge ” -type phase detector are examined. Using a behavioral model for each circuit block, it is shown that various circuit non-idealities introduce static phase offset in the phase detector, reduce the monotonic range of its transfer characteristics and eventually degrade the capture range and jitter tolerance of the clock and data recovery (CDR) loop. Lower bounds on the bandwidths of the various blocks in the CDR are also established in order to avoid variations of the transfer characteristics.
Keywords :
clock and data recovery circuits; jitter; phase detectors; Hogge-type phase detector; clock and data recovery circuits; clock and data recovery loop; jitter tolerance; linear CDR phase detectors; transfer characteristics; Bandwidth; Clocks; Data models; Delay; Detectors; Integrated circuit modeling; Jitter;
Conference_Titel :
Circuit Theory and Design (ECCTD), 2011 20th European Conference on
Conference_Location :
Linkoping
Print_ISBN :
978-1-4577-0617-2
Electronic_ISBN :
978-1-4577-0616-5
DOI :
10.1109/ECCTD.2011.6043306
