DocumentCode :
1713423
Title :
A CN-FDTD scheme and its application to VLSI interconnects/substrate modeling
Author :
Qiang, Rui ; Wu, Dagang ; Chen, Ji ; Wang, Chen ; Drewniak, Jim
Author_Institution :
Dept. of Electr. & Comput. Eng., Houston Univ., TX, USA
Volume :
1
fYear :
2004
Firstpage :
97
Abstract :
In this paper, a two-dimensional (2D) Crank-Nicholason (CN) finite difference time domain (FDTD) method is proposed for VLSI interconnect/substrate characterization. Through rigorous truncation and dispersion error analyses, a guideline on using this technique is presented. Several iterative solvers are investigated to accelerate the solution of the CN-FDTD scheme. Numerical examples are given to demonstrate the accuracy and the efficiency of the proposed algorithm.
Keywords :
VLSI; finite difference time-domain analysis; integrated circuit interconnections; integrated circuit modelling; iterative methods; 2D FDTD method; CN-FDTD scheme; Crank-Nicholason method; VLSI interconnect/substrate characterization; dispersion error analysis; finite difference time domain method; iterative solvers; truncation error analysis; two-dimensional FDTD method; Equations; Error analysis; Finite difference methods; Finite wordlength effects; Integrated circuit interconnections; Iterative algorithms; Iterative methods; Magnetic analysis; Time domain analysis; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility, 2004. EMC 2004. 2004 InternationalSymposium on
Print_ISBN :
0-7803-8443-1
Type :
conf
DOI :
10.1109/ISEMC.2004.1350004
Filename :
1350004
Link To Document :
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