CMOS latch based on a class-AB transconductor

Author

De la Cruz Blas, Carlos A. ; Green, Michael M.

Author_Institution

IEE Dept., Public Univ. of Navarre, Pamplona, Spain

fYear

2011

Firstpage

170

Lastpage

173

Abstract

In this paper a novel CMOS latch is designed using a class-AB transconductor as a core. The static latch behavior is studied using a homotopy method which allows highlighting sufficient conditions for the transconductor to become a latch. These last conditions are general and can be used for the design of new latches and comparators. The proposed latch features high speed together with high power efficiency inherited of class-AB transconductor. Besides, the latch with low-impedance loads can be used for low-swing mixed-signal applications and current-mode differential logic circuits. Simulation results using a 0.18u CMOS technology are presented in order to support the proposed study and circuits.

Keywords

CMOS digital integrated circuits; flip-flops; CMOS latch; CMOS technology; class-AB transconductor; comparators; current-mode differential logic circuits; homotopy method; low-impedance loads; low-swing mixed-signal applications; size 0.18 mum; static latch property; CMOS integrated circuits; Integrated circuit modeling; Latches; Simulation; Topology; Transconductance; Transistors; Class-AB; Current mode circuit; Low voltage; Multiple Operating Points; OTA; latch;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuit Theory and Design (ECCTD), 2011 20th European Conference on

Conference_Location

Linkoping

Print_ISBN

978-1-4577-0617-2

Electronic_ISBN

978-1-4577-0616-5

Type

conf

DOI

10.1109/ECCTD.2011.6043309

Filename

6043309