DocumentCode
1713593
Title
A new technique and a test structure for evaluating Vth distribution of flash memory cells
Author
Hakozaki, Kenji ; Sato, Shin-ichi ; Iguchi, Katasuji ; Sakiyama, Keizo
Author_Institution
Sharp Corp., Tenri, Japan
fYear
1997
Firstpage
127
Lastpage
130
Abstract
A new technique for evaluating Vth distribution in a large flash memory array using a simple test structure were studied. This new test technique can evaluate the Vth distribution by measuring I-V characteristics of all cells in an array which has no peripheral circuits. This technique identify the lowest Vth from the subthreshold characteristic and the median Vth from the linear characteristic of the array. A new test structure was designed for this technique and it can be put on the scribe line
Keywords
EPROM; integrated circuit testing; integrated memory circuits; I-V characteristics; flash memory cell array; linear characteristic; scribe line; subthreshold characteristic; test structure; threshold voltage distribution; Circuit testing; Current measurement; EPROM; Flash memory; Flash memory cells; Integrated circuit testing; Laboratories; Probability distribution; Subthreshold current; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronic Test Structures, 1997. ICMTS 1997. Proceedings. IEEE International Conference on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-3243-1
Type
conf
DOI
10.1109/ICMTS.1997.589355
Filename
589355
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