Architectural mitigation for high performance energy measurement

Analog Front End of any measurement devices suffer from the error arising out of the additive analog device offsets. Existing energy measurement device architectures uses a high pass filter (or a D.C. notch filter) at the output of the current channel Analog to Digital Converter (ADC) to cancel offsets generated by analog front-end, which makes it failing to measure the power consumption in a non-linear system driven by sinusoidal voltage waveform. This also poses two more serious problems with the design viz., disability of the device to measure the D.C. current and voltages and increase in the stabilization/settling time of the entire device, as the high-pass filter used are in general IIR in nature, making the device insufficient for faster switching in case it is used in various power saving modes. This article proposes a minor coarse grain architectural mitigation in the signal path to solve this problem, which makes the design less complicated, removal of phase compensation circuit/filter in order to have reliable and low cost measurement device.