DocumentCode
1713936
Title
A low-cost SoC architecture for the next-generation home-networked set-top box
Author
Ryan, S.A. ; Jones, A.M. ; Deaves, R.H.
Author_Institution
STMicroelectronics, Bristol
fYear
2009
Firstpage
1
Lastpage
2
Abstract
This paper presents an SoC architecture which integrates 1500DMIPS of CPU processing resource and an optimized memory system in order to meet the high performance, low power and low cost requirements of next-generation set-top boxes.
Keywords
home computing; system-on-chip; television; CPU processing resource; low-cost SoC architecture; next-generation home-networked set-top box; optimized memory system; Bandwidth; Cable TV; Computer architecture; Costs; Electrochemical machining; High definition video; Modems; Streaming media; Tuners; Universal Serial Bus;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2009. ICCE '09. Digest of Technical Papers International Conference on
Conference_Location
Las Vegas, NV
Print_ISBN
978-1-4244-4701-5
Electronic_ISBN
978-1-4244-2559-4
Type
conf
DOI
10.1109/ICCE.2009.5012370
Filename
5012370
Link To Document