Title :
Multilevel MPSoC Performance Evaluation Using MDE Approach
Author :
Rabie Ben Atitallah ; Bonde, Lossan ; Niar, Smail ; Meftali, Samy ; Dekeyser, Jean Luc
Author_Institution :
INRIA-FUTURS, Lezennes
Abstract :
In this paper, we present a multilevel framework for multiprocessor systems-on-chip (MPSoC) that makes fast simulation and performance evaluation possible in the design flow. In this framework, we use the model-driven engineering (MDE) approach within the GASPARD design flow. Two target simulation models at the cycle accurate bit accurate (CABA) and the timed programmers view (PVT) abstraction levels are defined. In addition, in this paper, a set of meta-models corresponding to the simulation models and the deployment phase are also detailed. The latter meta-model allows hardware component refinement with performance parameters specification. Experimental results show the usefulness of our framework to decrease the design complexity of MPSoC architecture and to acheive high speedup simulation with a negligible estimation error margin
Keywords :
multiprocessing systems; performance evaluation; system-on-chip; GASPARD design flow; MDE approach; cycle accurate bit accurate; hardware component refinement; model-driven engineering approach; multilevel MPSoC performance evaluation; multiprocessor systems-on-chip; negligible estimation error margin; performance parameters specification; timed programmers view abstraction level; Bonding; Clocks; Estimation error; Hardware; Model driven engineering; Multiprocessing systems; Next generation networking; Performance loss; Programming profession; Space exploration;
Conference_Titel :
System-on-Chip, 2006. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
1-4244-0621-8
Electronic_ISBN :
1-4244-0622-6
DOI :
10.1109/ISSOC.2006.321967