Recent research in analog placement considering thermal gradient

With the thermal effect, improper analog placements may degrade circuit performance because the thermal gradient can affect electrical characteristics of the thermally-sensitive devices. To mitigate the thermal effect in analog layout design, it is required to reduce thermally-induced mismatches among matched devices in addition to eliminating thermal hot spots. This paper presents major challenges for analog placement arising from the chip thermal gradient, introduces non-uniform and uniform thermal profiles as well as the corresponding placement configurations, surveys key existing techniques for analog placement under non-uniform and uniform thermal profiles, and provides the experimental results for analog placement with thermal consideration.