Title :
Analysis of Crosstalk and Process Variations Effects on On-Chip Interconnects
Author :
Nigussie, Ethiopia ; Tuuna, Sampo ; Plosila, Juha ; Isoaho, Jouni
Author_Institution :
Dept. of Inf. Technol., Turku Univ.
Abstract :
We present analysis of crosstalk and process variations effects on reliability and signal propagation delay of two delay-insensitive on-chip interconnects. The first interconnect is designed using conventional two-phase dual-rail encoding using voltage-mode signaling. The second one uses current-mode signaling with new implementation of two-phase dual-rail encoding. It uses multi-current level and differential switching of dual-rail wires to indicate the data value and its validity respectively. Performance comparison between the two interconnects shows the novel differentially switching dual-rail link is faster compared to the conventional two-phase dual-rail one. The effect of crosstalk is analyzed using 4-bit parallel data transfer using transmission line model with capacitive and inductive coupling and 16 different switching patterns. We analyze the effect of process variations on reliability and delay in the presence of crosstalk by changing wire width by plusmn10% and thickness by -10%. In addition the effect of plusmn3sigma supply voltage variation on delay is studied. The circuit is designed and simulated using Cadence Analog Spectre and Hspice of 130nm CMOS technology
Keywords :
CMOS integrated circuits; SPICE; delays; encoding; integrated circuit interconnections; integrated circuit reliability; interference (signal); 130 nm; CMOS technology; Cadence Analog Spectre; Hspice; capacitive coupling; crosstalk effect; current-mode signaling; differential switching; dual-rail encoding; dual-rail wires; inductive coupling; interconnect reliability; multicurrent level; on-chip interconnects; parallel data transfer; process variations effects; signal propagation delay; supply voltage variation; transmission line model; voltage-mode signaling; CMOS technology; Crosstalk; Delay effects; Encoding; Integrated circuit interconnections; Propagation delay; Signal analysis; Signal design; Signal processing; Voltage;
Conference_Titel :
System-on-Chip, 2006. International Symposium on
Conference_Location :
Tampere
Print_ISBN :
1-4244-0621-8
Electronic_ISBN :
1-4244-0622-6
DOI :
10.1109/ISSOC.2006.321992
