ACE: a VLSI chip for Galois field GF(2m) based exponentiation

In this paper, we present a new algorithm based on a pattern matching technique for computing exponentiations in GF(2^m), for values of m⩽8. A systolic array processor architecture has been developed by the authors for performing multiplication and division in GF(2^m). A similar strategy is proposed in this paper for achieving exponentiation at the rate of a new result every clock cycle. A prototype VLSI chip called ACE implementing the proposed algorithm for Galois field GF(2⁴) based exponentiation has been designed and verified using CMOS 2-micron technology. The chip can yield a computational rate of 40 million exponentiations per second