DocumentCode :
1715299
Title :
Data path testability evaluation via functional testability measures
Author :
Jamoussi, Mohamed ; Kaminska, Bozena
Author_Institution :
Dept. of Electr. Eng., Ecole Polytech. de Montreal, Que., Canada
fYear :
1994
Firstpage :
301
Lastpage :
306
Abstract :
This paper addresses a testability evaluation approach applied to VLSI circuits at the data path level. The proposed approach uses new functional testability measures, which are based on the techniques of Reduced Ordered Binary Decision Diagrams (ROBDDs) representing functional primitives. These measures are: the Variable Testability Measure (VTM), for predicting the test-vector number of a data path and the controllability and observability measures, for identifying untestable parts in a data path. An objective function is developed, which enables estimation of area, delay and testability constraints of a data path. In this context, a structural modification in the data-path architecture is proposed, to make the design testable and/or to optimize the global cost determined by the objective function
Keywords :
VLSI; circuit analysis computing; controllability; design for testability; digital integrated circuits; integrated circuit testing; logic testing; observability; Reduced Ordered Binary Decision Diagrams; VLSI circuits; controllability measures; data path testability evaluation; data-path architecture; functional testability measures; objective function; observability measures; test-vector number; variable testability measure; Boolean functions; Circuit testing; Controllability; Data structures; Delay estimation; Design optimization; High level synthesis; Observability; System testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1994., Proceedings of the Seventh International Conference on
Conference_Location :
Calcutta
ISSN :
1063-9667
Print_ISBN :
0-8186-4990-9
Type :
conf
DOI :
10.1109/ICVD.1994.282707
Filename :
282707
Link To Document :
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