Title :
Planar metallization intemonnected 3-D multi-chip module
Author :
Liang, Zhenxian ; van Wyk, J.D.
Author_Institution :
Power Electronics Integrated Packaging Lab.
Keywords :
Artificial intelligence; Assembly; Chip scale packaging; Electronics packaging; Manufacturing; Metallization; Optical device fabrication; Packaging machines; Power electronics; Substrates;
Conference_Titel :
Electronic Components and Technology Conference, 2003. Proceedings. 53rd
Print_ISBN :
0-7803-7791-5
DOI :
10.1109/ECTC.2003.1216426
