• DocumentCode
    1715695
  • Title

    Bitwise encoding of finite state machines

  • Author

    Monteiro, Josh ; Kukula, James ; Devadas, Srinivas ; Neto, Horácio

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
  • fYear
    1994
  • Firstpage
    379
  • Lastpage
    382
  • Abstract
    We propose an innovative method of encoding the states of finite state machines. Our approach consists of iteratively defining the code word, one bit at a time. In each iteration the input state machine is decomposed into two submachines, with the first submachine having only two states. One bit is therefore sufficient to encode this submachine and it can be assigned arbitrarily as the particular value it assumes for each state is of minimal influence in terms of the machine implementation. The process is repeated again having as input the second submachine, until all the bits are encoded. We provide experimental results which indicate that our method of iteratively defining one bit at a time can generally achieve superior results to existing sequential state assignment methods which try to solve large problems heuristically
  • Keywords
    encoding; finite state machines; iterative methods; logic CAD; sequential switching; state assignment; FSM; bitwise encoding; decomposition; finite state machines; input state machine; iteration; sequential state assignment; states encoding; submachines; Automata; Binary codes; Circuit synthesis; Costs; Encoding; Heuristic algorithms; Logic circuits; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1994., Proceedings of the Seventh International Conference on
  • Conference_Location
    Calcutta
  • ISSN
    1063-9667
  • Print_ISBN
    0-8186-4990-9
  • Type

    conf

  • DOI
    10.1109/ICVD.1994.282723
  • Filename
    282723