• DocumentCode
    1716906
  • Title

    Wafer deposition/metallization and back grind, process-induced warpage simulation

  • Author

    Irving, Scott ; Liu, Yong

  • Author_Institution
    Fairchild Semiconductor Corporation
  • fYear
    2003
  • Firstpage
    1459
  • Lastpage
    1462
  • Keywords
    Computational modeling; Dielectric materials; Electronic components; History; Internal stresses; Material properties; Metallization; Semiconductor device modeling; Substrates; Temperature;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2003. Proceedings. 53rd
  • ISSN
    0569-5503
  • Print_ISBN
    0-7803-7791-5
  • Type

    conf

  • DOI
    10.1109/ECTC.2003.1216487
  • Filename
    1216487
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1716906