• DocumentCode
    1717561
  • Title

    The SH microprocessor: 16-bit fixed length instruction set provides better power and die size

  • Author

    Freet, P.

  • Author_Institution
    Hitachi America Ltd., Brisbane, CA, USA
  • fYear
    1994
  • Firstpage
    486
  • Lastpage
    488
  • Abstract
    As RISC architectures enter the embedded computing realm, a better compromise between performance, price, and power must be reached. Existing RISC microprocessors are not designed for embedded applications. The Hitachi SH microprocessor is an example of a new breed of RISC CPUs designed strictly for embedded applications. The defining feature of the SH which separates it from other RISC CPUs is its fixed 16-bit instruction length. The author discusses the advantages of this type of architecture and establishes a rationale for its superiority for embedded applications. The concept of microprocessor efficiency is introduced and used to determine value.<>
  • Keywords
    microprocessor chips; reduced instruction set computing; 16 bit; 16-bit fixed length instruction set; Hitachi SH; RISC architectures; RISC microprocessors; SH microprocessor; die size; power; Application software; Costs; Embedded system; Microprocessors; Operating systems; Personal digital assistants; Random access memory; Reduced instruction set computing; Silicon; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '94, Digest of Papers.
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-5380-9
  • Type

    conf

  • DOI
    10.1109/CMPCON.1994.282879
  • Filename
    282879