DocumentCode :
1717632
Title :
Fast startup of LC VCOs using circuit asymmetries
Author :
Kim, Joshua H. ; Green, Michael M.
Author_Institution :
Dept. of EECS, Univ. of California, Irvine, CA, USA
fYear :
2011
Firstpage :
69
Lastpage :
72
Abstract :
The effect of deliberate circuit mismatches in an LC VCO is investigated and it is shown that such mismatches can significantly reduce the oscillation start-up time. An analysis is presented that shows that the presence of mismatches results in a common-mode disturbance simultaneous with the turn-on of the tail current. The use of this technique is applied to a low-power transmitter for an ultra-wideband wireless communication system using the on-off keying modulation scheme. Simulations using a 0.18-μm CMOS technology with a 4 GHz carrier frequency give 34.5 pJ/bit assuming a repetition rate of 1 Mb/s.
Keywords :
CMOS analogue integrated circuits; amplitude shift keying; voltage-controlled oscillators; CMOS technology; LC VCO; circuit asymmetries; frequency 4 GHz; low-power transmitter; on-off keying modulation scheme; oscillation start-up time; size 0.18 mum; ultra-wideband wireless communication system; Capacitors; Mathematical model; RLC circuits; Transient analysis; Transmitters; Voltage-controlled oscillators; Voltage-controlled oscillators; analog CMOS; startup circuit;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuit Theory and Design (ECCTD), 2011 20th European Conference on
Conference_Location :
Linkoping
Print_ISBN :
978-1-4577-0617-2
Electronic_ISBN :
978-1-4577-0616-5
Type :
conf
DOI :
10.1109/ECCTD.2011.6043611
Filename :
6043611
Link To Document :
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