DocumentCode
1718633
Title
CDRAM in a unified memory architecture
Author
Hart, C.A.
Author_Institution
Mitsubishi Electron. America, Sunnyvale, CA, USA
fYear
1994
Firstpage
261
Lastpage
266
Abstract
Improved system performance and lower cost can be achieved in small systems by combining all required memory functions into a single bank (or device) of "unified" memory. For example, the L2 cache, frame buffer, and main memory can be combined. The CDRAM has been designed to provide the performance level of large systems in a small and low cost form factor. Thus it is a very attractive option for unified memory architectures.<>
Keywords
DRAM chips; memory architecture; storage management chips; CDRAM; L2 cache; frame buffer; low cost form factor; main memory; memory functions; small systems; system performance; unified memory architecture; Bandwidth; Control systems; Costs; Delay; Graphics; Memory architecture; Personal communication networks; Random access memory; SDRAM; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon Spring '94, Digest of Papers.
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-8186-5380-9
Type
conf
DOI
10.1109/CMPCON.1994.282913
Filename
282913
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