Evaluation of university semiconductor knowledge in a DRAM manufacturing environment

Author

Vollrath, Joerg

Author_Institution

Infineon Technol., Richmond, VA, USA

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

99

Lastpage

101

Abstract

This paper shows the application of knowledge from a semiconductor technology engineering university program in a semiconductor memory development and manufacturing environment. The university program presented shows classes and an example for a Ph.D. thesis. Benefits and limitations of the university program are discussed in relation to the job requirements for semiconductor development and manufacturing. An example of a class targeting memory development and manufacturing is given

Keywords

DRAM chips; electronic engineering education; integrated circuit manufacture; integrated circuit technology; semiconductor technology; DRAM manufacturing environment; job requirements; knowledge application; memory development; memory manufacturing; semiconductor development; semiconductor manufacturing; semiconductor memory development/manufacturing environment; semiconductor technology engineering university program; university program; university program benefits; university program limits; university semiconductor knowledge; CMOS process; Knowledge engineering; Logic design; Manufacturing industries; Manufacturing processes; Pulp manufacturing; Random access memory; Semiconductor device manufacture; Software measurement; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

University/Government/Industry Microelectronics Symposium, 2001. Proceedings of the Fourteenth Biennial

Conference_Location

Richmond, VA

ISSN

0749-6877

Print_ISBN

0-7803-6691-3

Type

conf

DOI

10.1109/UGIM.2001.960304

Filename

960304