Acceleration of financial Monte-Carlo simulations using FPGAs

There is a need for improved performance in financial computing, both to improve the quality of the results produced by existing methods, such as incorporating more realistic models of risk, and to increase the scope of applications, such as modelling corporation-wide exposure to risk without applying simplifying abstractions. However, increased performance comes at significant cost, both in terms of the capital costs, and also in terms of power consumption. Field-Programmable Gate Arrays (FPGAs) offer one way of providing greater performance than CPUs while also reducing power consumption, and are particularly well-suited for computationally intensive tasks such as Monte-Carlo simulation. However, existing programming models for FPGAs require too much specialist knowledge and programmer effort, making it infeasible to use them in most financial applications. This paper gives an overview of Contessa, a high-level language for describing Monte-Carlo simulations, with an automated compilation route to pipelined high-performance hardware. By providing a push-button high-level route to FPGA-accelerated performance, languages such as Contessa provide one way in which the benefits of FPGAs can be exploited in computational finance.