Single and two-stage OTAs for high-speed CMOS pipelined ADCs

This paper compares one- and two stage operational transconductance amplifiers (OTAs) to be used in an 8-bit high speed (440-MS/s) deep submicron CMOS (130nm) low voltage (1.2V) pipelined Analogue to Digital Converter (ADC) based on an 1.5-bit double sampling Multiplying Digital to Analogue Converter (MDAC). The main emphasis is put on the OTA DC-gain, gain-bandwidth (GBW), differential linear output range V_OPP and power consumption. Most basic OTAs are compared through the calculations and simulations. In the potential topologies (regulated single stage or two stage), single stage OTA has a better phase response and a lower power consumption, whereas two stage OTA achieves larger linear range.