DocumentCode :
1722094
Title :
Convergence and output MSE of digital frequency-locked loop for wireless communications
Author :
Ling, Fuyun
Author_Institution :
Cellular Infrastructure Group, Motorola Inc., Arlington Heights, IL, USA
Volume :
2
fYear :
1996
Firstpage :
1215
Abstract :
The basic digital frequency-locked loop (DFLL) with a quadri-correlator frequency detector is analyzed. Detailed derivations of its convergence characteristic and steady state mean-squared error (MSE) are given for BPSK signaling with known and unknown transmitted symbols. Simulation results for the known symbol case are given, which agree very well with analysis
Keywords :
convergence; digital circuits; digital radio; phase shift keying; radio receivers; synchronisation; telecommunication signalling; tracking; BPSK signaling; DFLL; convergence characteristic; digital frequency-locked loop; output MSE; quadri-correlator frequency detector; steady state mean-squared error; transmitted symbols; wireless communications; Automatic frequency control; Binary phase shift keying; Convergence; Filters; Frequency locked loops; Phase locked loops; Signal analysis; Signal processing; Voltage-controlled oscillators; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Vehicular Technology Conference, 1996. Mobile Technology for the Human Race., IEEE 46th
Conference_Location :
Atlanta, GA
ISSN :
1090-3038
Print_ISBN :
0-7803-3157-5
Type :
conf
DOI :
10.1109/VETEC.1996.501505
Filename :
501505
Link To Document :
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