• DocumentCode
    1722227
  • Title

    A power grid optimization algorithm considering via reliability

  • Author

    Fukui, Masahiro ; Miki, Haruo ; Yoshikawa, Masaya ; Tsukiyama, Shuji

  • Author_Institution
    Dept. of VLSI Syst. Design, Ritsumeikan Univ., Kusatsu, Japan
  • fYear
    2011
  • Firstpage
    809
  • Lastpage
    812
  • Abstract
    Recently, fine-pattern process approaching to physical limit and the rise of heat density become major factors of reliability degradation of LSIs. Especially reliability problems in power grids occur more notably in vias. The optimization of via design in consideration of the influence of heat and current density is increasing the importance. This paper formulates via reliability with the mean life time. It gives the minimum mean life time as design restrictions, and it not only fills design restrictions, but proposes a technique of obtaining the solution of more reliable power supply wiring synthetically in consideration of a trade-off relation with other optimized indices, such as a wiring congestion degree, IR drops, and electro migration. It also includes the function which increases via area to improve the reliability of via, even if it increases wiring congestion.
  • Keywords
    current density; electromigration; large scale integration; optimisation; power grids; power system reliability; IR drop; LSI reliability degradation; current density; electromigration; fine-pattern process; heat density; minimum mean life time; power grid optimization algorithm; power supply wiring; wiring congestion degree; Reliability engineering; Wiring; electro migration; power grid optimization; reliability; via; wiring congestion;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuit Theory and Design (ECCTD), 2011 20th European Conference on
  • Conference_Location
    Linkoping
  • Print_ISBN
    978-1-4577-0617-2
  • Electronic_ISBN
    978-1-4577-0616-5
  • Type

    conf

  • DOI
    10.1109/ECCTD.2011.6043836
  • Filename
    6043836