A class-AB very low voltage amplifier and sample & hold circuit

In this paper we present a low-power low-voltage class-AB amplifier with rail-to-rail output swing capable of operating from 0.5 V to 1.0 V of supply voltage, and two Sample & Hold (SHA) circuits based on this amplifier. The bias current and the bandwidth of the amplifier depend on the voltage supply, so that for low-power operation a low supply voltage can be used. The two SHAs have a nominal gain of one and two: as the latter is the basic stage of a Multiplying DAC (MDAC), the proposed amplifier may be used to obtain a low-voltage low-power pipeline Analog-to-Digital Converter (ADC). The design has been validated by simulations using the technology models of the STMicroelectronics 65 nm CMOS process. The two-stage amplifier has a gain of 26 dB at 0.5 V, which increases up to 37 dB at 1.0 V, and a unity gain frequency of 14 MHz when supplied at 0.5 V, which increases beyond 1 GHz at 1.0 V. The two SHAs can work at up to 5 MSps with a 0.5 V supply and consume less than 2 μW, showing a THD of -56 dB throughout the Nyquist band. Higher sampling frequencies can be obtained increasing the supply voltage and power consumption.