A reliable brain computer interface implemented on FPGA for mobile dialing system

Author

Chih-Wei Feng ; Jui-Chung Chang ; Wei-Chen Chen ; Wai-Chi Fang

Author_Institution

Dept. of Electr. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2015

Firstpage

110

Lastpage

111

Abstract

This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six buttons (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose the number by gazing at the computer interface. This proposed EEG (Electroencephalography) system has been implemented in Field-Programmable Gate Arrays (FPGA) and it features high accuracy, integration density, and low cost. These features are meaningful for implementing a real time SSVEP-based BCI.

Keywords

brain-computer interfaces; electroencephalography; field programmable gate arrays; mobile computing; statistical analysis; visual evoked potentials; EEG system; FPGA; SSVEP-based BCI; brain computer interface; canonical correlation analysis; electroencephalography; field programmable gate array; frequency 10 Hz; frequency 11 Hz; frequency 12 Hz; frequency 13 Hz; frequency 14 Hz; frequency 9 Hz; mobile dialing system; steady-state visual evoked potential; Accuracy; Bandwidth; Brain-computer interfaces; Correlation; Electroencephalography; Field programmable gate arrays; Visualization;

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics - Taiwan (ICCE-TW), 2015 IEEE International Conference on

Conference_Location

Taipei

Type

conf

DOI

10.1109/ICCE-TW.2015.7216805

Filename

7216805