• DocumentCode
    1723107
  • Title

    Analytical analysis of ATM switches with multiple input queues with bursty traffic

  • Author

    Nong, Ge ; Hamdi, Mounir ; Muppala, Jogesh K.

  • Author_Institution
    Dept. of Comput. Sci., Hong Kong Univ., Hong Kong
  • Volume
    2
  • fYear
    1999
  • fDate
    6/21/1905 12:00:00 AM
  • Firstpage
    1222
  • Abstract
    A queueing model for a novel multiple input-queued ATM switch under i.i.d bursty traffic modeled by 2-state Markov modulated Bernoulli processes (MMBPs) is proposed. A quasi-birth-death (QBD) chain is constructed as the underlying Markov chain of the queueing model. Each input port of the switch maintains N separate queues each for buffering cells destined to one of the N outputs and an efficient randomized parallel algorithm, called parallel iterative matching (PIM) is used by the switch to schedule the head-of-line (HOL) cells of the input queues out to the output queues. The QBD chain is solved by finding the fixed point of the introduced fixed point equation using an iterative computing scheme. Interesting performance parameters of the switch such as the throughput, the mean cell delay and the cell loss probability are derived from the solved QBD chain. Numerical results from both the analytical model and simulations are presented and the accuracy of the analysis is discussed. The queueing model can be extended using the same technique to the situation where complicated bursty traffic with more states is asserted to the switch
  • Keywords
    Markov processes; asynchronous transfer mode; buffer storage; delays; iterative methods; packet switching; parallel algorithms; probability; queueing theory; telecommunication traffic; 2-state Markov modulated Bernoulli processes; HOL cells; MMBP; Markov chain; analytical model; cell loss probability; efficient randomized parallel algorithm; fixed point equation; head-of-line cells; i.i.d bursty traffic; input port; iterative computing scheme; mean cell delay; multiple input queues; multiple input-queued ATM switch; output queues; parallel iterative matching; performance parameters; quasi-birth-death chain; queueing model; simulations; throughput; Analytical models; Asynchronous transfer mode; Design for quality; Equations; Parallel algorithms; Performance loss; Processor scheduling; Queueing analysis; Switches; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Global Telecommunications Conference, 1999. GLOBECOM '99
  • Conference_Location
    Rio de Janeireo
  • Print_ISBN
    0-7803-5796-5
  • Type

    conf

  • DOI
    10.1109/GLOCOM.1999.829966
  • Filename
    829966