A low power RC time constant auto-tuning circuit for RC-integrators in high linearity continuous-time delta sigma modulators

This paper presents the design of a low power RC time constant tuning circuit for high linearity 5^th order continuous time Delta Sigma modulator used in LTE-A application with 40 MHz bandwidth. This auto-tuning system contains an analog integrator, a voltage comparator, and a digital tuning engine performed by a clock generator, a register and a counter which generate a control word that sets a programmable capacitors bank to obtain an RC time constant accuracy better than ±2%. It resolves process variations issues which could result in up to ±30% of RC time constant uncertainty and degrade the Delta Sigma modulators SNDR. The system has been designed in a 65 nm CMOS technology with 1.2 V supply voltage and power consumption is less than 200 μW.