DocumentCode
1723836
Title
NetCOPE: Platform for Rapid Development of Network Applications
Author
Martmek, T. ; Kosek, Martin
Author_Institution
Fac. of Inf. Technol. Brno, Univ. of Technol. Bozetechova, Brno
fYear
2008
Firstpage
1
Lastpage
6
Abstract
Rapid development in area of network technologies and the bandwidth increase to 1Gbps or 10Gbps puts more and more requirements to devices, that have to process or analyze a network traffic. The results from numerous research works show that the performance of conventional processors is not sufficient for many applications. As an reasonable alternative the splitting of computation task between a processor and an acceleration card with FPGA chips is proposed. This paper describes the basic scope of system architecture for rapid development of network applications based on the connection of a processor and an acceleration card-NetCOPE. The proposed platform implements the parts common for most of applications such as I/O blocks, connection of an application acceleration core to a system bus and fast DMA transfers. Using the platform a designer is concentrated on realization of the target application only and can easily move its designs to different development boards.
Keywords
field programmable gate arrays; multiprocessing systems; system buses; DMA transfers; FPGA chips; NetCOPE; acceleration card; network applications; network traffic; processors; system architecture; system bus; Acceleration; Application software; Bandwidth; Computer architecture; Field programmable gate arrays; Hardware; Information technology; Network interfaces; System buses; Telecommunication traffic;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on
Conference_Location
Bratislava
Print_ISBN
978-1-4244-2276-0
Electronic_ISBN
978-1-4244-2277-7
Type
conf
DOI
10.1109/DDECS.2008.4538789
Filename
4538789
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