DocumentCode :
1724360
Title :
True single phase clock dynamic CMOS circuit technique
Author :
Karlsson, Ingemar
Author_Institution :
Dept. of Phys. & Meas. Technol., Linkoping Univ., Sweden
fYear :
1988
Firstpage :
475
Abstract :
Some CMOS circuit techniques, based on a true single-phase clock, where the clock is never inverted, are described. Single-phase dynamic logic and single-phase precharge logic circuits are considered. The advantage of this approach is simple and compact clock distribution and high speed. The high-speed possibility was demonstrated with a binary divider. A clock frequency of 160 MHz was achieved when only standard transistors in a 3-μm CMOS process were used. The single-phase clock is relatively insensitive to clock rise time, clock fall time, and clock skew
Keywords :
CMOS integrated circuits; clocks; integrated logic circuits; 160 MHz; 3 micron; binary divider; clock fall time; clock rise time; clock skew; compact clock distribution; single phase clock dynamic CMOS circuit technique; single-phase precharge logic circuits; CMOS logic circuits; CMOS technology; Circuit testing; Clocks; Flip-flops; Logic circuits; Phase measurement; Physics; Pulse inverters; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo
Type :
conf
DOI :
10.1109/ISCAS.1988.14967
Filename :
14967
Link To Document :
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