Fine-grained power-gating scheme of a nonvolatile logic-in-memory circuit for low-power motion-vector extraction

Data-transfer localization is a key technique to solve communication bottleneck between memory and logic modules in realizing high-speed VLSI systems, while it is difficult to use power-gating technique because volatile storage functions are distributed in a CMOS logic-circuit plane, which causes large power dissipation. In this paper, we utilize nonvolatile logic-in-memory (NV-LIM) architecture, where nonvolatile storage functions are distributed over a logic-circuit plane, to solve the above issues. As a typical example of the NV-LIM circuit, we apply it to motion-vector extraction. By the use of fine-grained power-gating technique, total power dissipation of the proposed hardware can be reduced to 60% in comparison with that of a conventional CMOS-only-based hardware.