• DocumentCode
    172611
  • Title

    Double barrier magnetic tunnel junctions with write/read mode select layer

  • Author

    Clement, P.-Y. ; Baraduc, C. ; Chshiev, M. ; Dieny, Bernard ; Vila, Laurent ; Ducruet, C.

  • Author_Institution
    Spintec, CEA, Grenoble, France
  • fYear
    2014
  • fDate
    18-21 May 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In this study, special STT-RAM were designed, built and tested, allowing to read and write at similar voltages. This is achieved by maximizing the Spin-Transfer-Torque (STT) efficiency on the storage layer magnetization during write and minimizing it during read. In order to achieve this STT tuning, double barrier magnetic tunnel junctions were prepared wherein the storage layer is sandwiched between two polarizing layers. Each polarizing layer is separated from the storage layer by a tunnel barrier. The magnetization of one of the polarizing layer is always pinned in a fixed direction whereas the other one, called mode select layer, can be switched parallel or antiparallel to the first one depending whether the magnetic tunnel junction (MTJ) is in read or respectively write mode. In the parallel configuration of the polarizing layers, the STT efficiency is minimized allowing to read at relatively high voltage leading to fast readout without risk of write disturb during read. In the antiparallel configuration of the polarizing layer, the STT efficiency is maximized allowing writing at lower current density. In this system, the magnetization of the storage layer is switched by STT whereas the magnetization of the mode select layer is switched by field. Switching from read mode to write mode and vice versa is achieved by sharing a single pulse of magnetic field for all bits of the same word.
  • Keywords
    MRAM devices; current density; magnetic tunnelling; magnetisation; magnetoelectronics; MRAM; MTJ; STT-RAM; antiparallel configuration; current density; double barrier magnetic tunnel junctions; magnetic field; parallel configuration; polarizing layers; spin-transfer-torque efficiency; storage layer; storage layer magnetization; tunnel barrier; write disturb; write-read mode select layer; Annealing; Junctions; Magnetic field measurement; Magnetic tunneling; Magnetization; Resistance; Switches; Magnetic Tunnel Junctions; STT-RAM; double barrier;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Workshop (IMW), 2014 IEEE 6th International
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4799-3594-9
  • Type

    conf

  • DOI
    10.1109/IMW.2014.6849366
  • Filename
    6849366