• DocumentCode
    1726348
  • Title

    Exploring the Silicon Design Limits of Thin Wafer IGBT Technology: The Controlled Punch Through (CPT) IGBT

  • Author

    Vobecký, J. ; Rahimo, M. ; Kopta, A. ; Linder, S.

  • Author_Institution
    Semicond., ABB Switzerland Ltd., Lenzburg
  • fYear
    2008
  • Firstpage
    76
  • Lastpage
    79
  • Abstract
    The paper introduces a new controlled punch through (CPT) IGBT buffer for next generation devices, which utilise thin wafers technology. The new concept is based on very shallow buffers with optimized doping profiles enabling minimum silicon design thicknesses close to the theoretical limit for a given voltage class. The advanced shaping of the buffer doping profile brings additional degree of freedom in IGBT design. The work was carried out for 1200V IGBTs, but the CPT buffer can be applied with advantages to any voltage class. While this approach is targeting mainly reduced ON-State losses, the IGBT maintains good blocking, soft turn-off, wide SOA and good short circuit capability.
  • Keywords
    insulated gate bipolar transistors; silicon; buffer doping; controlled punch through IGBT buffer; silicon; thin wafer IGBT technology; Annealing; Anodes; Circuits; Doping profiles; Insulated gate bipolar transistors; Leakage current; Paper technology; Power semiconductor devices; Silicon; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Semiconductor Devices and IC's, 2008. ISPSD '08. 20th International Symposium on
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    978-1-4244-1532-8
  • Electronic_ISBN
    978-1-4244-1533-5
  • Type

    conf

  • DOI
    10.1109/ISPSD.2008.4538901
  • Filename
    4538901