Geometry effect on CMOS transistor stability under DC gate stress

The authors show that transistor degradation is aggravated with an increase in channel length (L) and width (W) for negative gate bias stress, different from the W/L ratio dependence for positive stress reported previously. Nonuniform interface-state generation is believed to be the dominant degradation mechanism for negative stress, whereas negative trapped charge is the prevalent cause of instability for positive stress. This geometry effect needs to be considered when estimating CMOS transistor stability.<>