DocumentCode
1726629
Title
Design and modeling methodology of embedded passives substrate in a compact wireless connectivity module
Author
Chiu, Chi-Tsung ; Lee, Pao-Nan ; Chen, Chi-Han ; Lin, Yuan-Hung ; WU, Yei-Shen ; Ou, Ying-Te ; Hsu, Chih-Jing
Author_Institution
R&D Div., Adv. Semicond. Eng. Inc., Kaohsiung, Taiwan
fYear
2011
Firstpage
144
Lastpage
149
Abstract
A novel wireless connectivity module by using embedded high dielectric constant (Dk) material in a 6 layer build-up substrate to form the passive circuit is presented. The module shows 18% size shrinking while embedded BPF, Balun and Divider circuit. The embedded BPF and Balun show 2 dB and 1 dB insertion loss at passband respectively. An efficient design methodology is demonstrated for high performance and yield prediction. It shows good correlation between design and measurement validation. In this study, the packaging level reliability test is proceeded to investigate the function degradation after aging process. It is suggested the embedded circuit design margin should include manufacturing tolerance, pattern deform and material property change after aging process.
Keywords
Bluetooth; ageing; circuit reliability; electronics packaging; network synthesis; passive networks; permittivity; wireless LAN; Bluetooth-WLAN combo module design; aging process; balun; build-up substrate; compact wireless connectivity module; divider circuit; embedded circuit design; embedded high dielectric constant material; embedded passives substrate; function degradation; insertion loss; packaging level reliability test; passive circuit; pattern deformation; Band pass filters; Capacitors; Impedance matching; Insertion loss; Integrated circuit modeling; Radio frequency; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location
Lake Buena Vista, FL
ISSN
0569-5503
Print_ISBN
978-1-61284-497-8
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2011.5898505
Filename
5898505
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