A highly scalable 8-layer 3D vertical-gate (VG) TFT NAND Flash using junction-free buried channel BE-SONOS device

Author

Lue, Hang-Ting ; Hsu, Tzu-Hsuan ; Hsiao, Yi-Hsuan ; Hong, S.P. ; Wu, M.T. ; Hsu, F.H. ; Lien, N.Z. ; Wang, Szu-Yu ; Hsieh, Jung-Yu ; Yang, Ling-Wu ; Yang, Tahone ; Chen, Kuang-Chao ; Hsieh, Kuang-Yeu ; Lu, Chih-Yuan

Author_Institution

Emerging Central Lab., Macronix Int. Co., Ltd., Hsinchu, Taiwan

fYear

2010

Firstpage

131

Lastpage

132

Abstract

An 8-layer, 75 nm half-pitch, 3D stacked vertical-gate (VG) TFT BE-SONOS NAND Flash array is fabricated and characterized. We propose a buried-channel (n-type well) device to improve the read current of TFT NAND, and it also allows the junction-free structure which is particularly important for 3D stackable devices. Large self-boosting disturb-free memory window (6V) can be obtained in our device, and for the first time the “Z-interference” between adjacent vertical layers is studied. The proposed buried-channel VG NAND allows better X, Y pitch scaling and is a very attractive candidate for ultra high-density 3D stackable NAND Flash.

Keywords

NAND circuits; flash memories; thin film circuits; thin film transistors; 3D vertical-gate TFT NAND Flash; Z-interference; buried channel BE-SONOS device; junction-free structure; size 75 nm; Arrays; Interference; Logic gates; Programming; Thin film transistors; Three dimensional displays;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2010 Symposium on

Conference_Location

Honolulu

Print_ISBN

978-1-4244-5451-8

Electronic_ISBN

978-1-4244-5450-1

Type

conf

DOI

10.1109/VLSIT.2010.5556199

Filename

5556199