Title :
Vertical double gate Z-RAM technology with remarkable low voltage operation for DRAM application
Author :
Kim, Joong-Sik ; Chung, Sung-Woong ; Jang, Tae-Su ; Lee, Seung-Hwan ; Son, Dong-Hee ; Chung, Seoung-Ju ; Hwang, Sang-Min ; Banna, Srinivasa ; Bhardwaj, Sunil ; Gupta, Mayank ; Kwon, Jungtae ; Kim, David ; Popov, Greg ; Gopinath, Venkatesh ; Van Buskirk, M
Author_Institution :
R&D Div., Hynix Semicond. Inc., Icheon, South Korea
Abstract :
Vertical double gate floating body (FB) Z-RAM memory cell technology fabricated on a recess gate DRAM technology is presented. Cell operating voltage of 0.5V with comparable static retention and > 1000× improvement in dynamic retention is reported. The reported vertical double gate FB cell is the cell with the lowest operation voltage reported to date.
Keywords :
low-power electronics; random-access storage; DRAM application; dynamic retention; low voltage operation; recess gate DRAM technology; static retention; vertical double gate FB cell; vertical double gate Z-RAM technology; vertical double gate floating body Z-RAM memory cell; Arrays; Logic gates; Low voltage; Programming; Random access memory; Substrates; 1T-DRAM; ZRAM; floating body cell;
Conference_Titel :
VLSI Technology (VLSIT), 2010 Symposium on
Conference_Location :
Honolulu
Print_ISBN :
978-1-4244-5451-8
Electronic_ISBN :
978-1-4244-5450-1
DOI :
10.1109/VLSIT.2010.5556212
