Fast 32-channel readout chip with counters for GEMs, APDs and MGCs

New bright radiation sources like the new generation spallation sources, require fast detectors and fast readout electronics. Position sensitive detectors for imaging applications will be segmented and data rates of 10⁷ s^-1 per readout channel are envisaged. We are developing a 32-channel self triggering fast readout chip, with two 24-bit 100 MHz counters per channel. Per chip one calibration input, the analog output of one selectable channel and the common OR-ed comparator output are available for testing and calibration. The common comparator threshold is set on chip with a DAC. Noisy channels can be disabled. Two counters per channel are implemented for off-line correction of 2-channel clusters. Most parts of the chip are tested and some are available as separate chips. On the 8 channel preamplifier-shaper chip for each channel a 50 Ω output buffer has been added. Rise and fail times of 2.4 ns and 7.6 ns respectively have been obtained.