DocumentCode
1727722
Title
Asymmetrical differential signaling for notchy wireline channels
Author
Aryanfar, Farshid ; Abbasfar, Aliazam
Author_Institution
Rambus Labs., Rambus Inc., Sunnyvale, CA, USA
fYear
2011
Firstpage
473
Lastpage
476
Abstract
A passive resonance mitigation technique for differential and multi-wire channels is proposed. In this method, the frequency responses of wires are adjusted using passive channel engineering to create intentional offset in respect to one another, resulting in an improved frequency response for the differential or multi-wire links. An example of the proposed technique has been implemented by intentionally increasing the capacitive load on one of the traces in a differential channel to diversify frequency response of the signal paths from the controller to the DRAM in the presence of frequency selective notches in the channel. The proposed idea is verified in an experimental setup and by comparing measured eye diagrams for standard differential channel against improved channel using proposed solution.
Keywords
DRAM chips; frequency response; printed circuits; wires (electric); DRAM; asymmetrical differential signaling; capacitive load; differential channel; frequency response; frequency selective notch; multiwire channel; notchy wireline channel; passive channel engineering; passive resonance mitigation technique; CMOS integrated circuits; Decision feedback equalizers; Frequency response; Random access memory; Receivers; Resonant frequency; Wires; Differential signaling; high speed; memory; multi-drop; notchy channel; resonance;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2011 IEEE 61st
Conference_Location
Lake Buena Vista, FL
ISSN
0569-5503
Print_ISBN
978-1-61284-497-8
Electronic_ISBN
0569-5503
Type
conf
DOI
10.1109/ECTC.2011.5898553
Filename
5898553
Link To Document