Title :
Low temperature SER and noise in a high speed DRAM
Author :
Henkels, W.H. ; Lu, N.C.C. ; Hwang, W. ; Rajeevakumar, T.V. ; Franch, R.L. ; Jenkins, K.A. ; Bucelot, T.J. ; Heide, D.F. ; Immediato, M.J.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The soft error rate (SER) and power bus noise were measured for a high-speed 512 kb CMOS DRAM (dynamic random access memory) operated at liquid-nitrogen temperatures. The SER decreased by about 3-20 times, depending upon cycle time and data type, and the power bus noise increased, but only modestly, at low temperature. These results show that the noise and SER do not preclude high-speed cryogenic DRAM operation. Compensation of increased inductive noise by decreased resistive noise is found to be a significant advantage in obtaining speed improvement by temperature reduction, rather than by room-temperature circuit and device techniques
Keywords :
CMOS integrated circuits; integrated circuit testing; integrated memory circuits; low-temperature techniques; random noise; random-access storage; 512 kbit; 77 K; CMOS DRAM; cycle time; high-speed cryogenic DRAM operation; inductive noise; power bus noise; resistive noise; soft error rate; speed improvement; CMOS technology; Circuit noise; Circuit testing; Copper; Cryogenics; Nitrogen; Random access memory; Semiconductor device measurement; Temperature measurement; Temperature sensors;
Conference_Titel :
Low Temperature Semiconductor Electronics, 1989., Proceedings of the Workshop on
Conference_Location :
Burlington, VT
DOI :
10.1109/LTSE.1989.50171
