III–V MOSFETs with a new self-aligned contact

Author

Zhang, Xingui ; Guo, Huaxin ; Ko, Chih-Hsin ; Wann, Clement H. ; Cheng, Chao-Ching ; Lin, Hau-Yu ; Chin, Hock-Chun ; Gong, Xiao ; Lim, Phyllis Shi Ya ; Luo, Guang-Li ; Chang, Chun-Yen ; Chien, Chao-Hsin ; Han, Zong-You ; Huang, Shih-Chiang ; Yeo, Yee-Chia

Author_Institution

Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore (NUS), Singapore, Singapore

fYear

2010

Firstpage

233

Lastpage

234

Abstract

We report the first demonstration of III-V n-MOSFETs with self-aligned contact technology. The self-aligned contact was formed using a salicide-like process which is compatible with CMOS process flow. A new epitaxy process was developed to selectively form a thin continuous germanium-silicon (GeSi) layer on gallium arsenide (GaAs) source and drain (S/D) regions. Nickel was deposited and annealed to form NiGeSi, and unreacted metal was removed. A second anneal diffuses Ge and Si into GaAs to form heavily n+ doped regions, and a novel self-aligned nickel germanosilicide (NiGeSi) ohmic contact was achieved. MOSFETs with the new self-aligned metallization process were realized.

Keywords

CMOS integrated circuits; III-V semiconductors; MOSFET; annealing; epitaxial growth; gallium arsenide; germanium compounds; metallisation; ohmic contacts; CMOS process flow; GaAs; III-V MOSFET; III-V n-MOSFET; NiGeSi; annealing; epitaxy process; gallium arsenide; ohmic contact; salicide-like process; self-aligned contact technology; self-aligned metallization process; self-aligned nickel germanosilicide; source and drain regions; thin continuous germanium-silicon layer; Annealing; Epitaxial growth; Gallium arsenide; Logic gates; MOSFETs; Nickel; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology (VLSIT), 2010 Symposium on

Conference_Location

Honolulu

Print_ISBN

978-1-4244-5451-8

Electronic_ISBN

978-1-4244-5450-1

Type

conf

DOI

10.1109/VLSIT.2010.5556240

Filename

5556240