Ceramics vs. low-CTE organic packaging of TSV silicon interposers

As industry tends toward I/O and function increase, the wiring density and layer counts have increased extending today´s package sizes to about 50mm. Organic materials have been excessively used and preferred to ceramics materials due to lower cost, general market acceptance of organic materials and better board level reliability. The new modified glass/ceramic composite LTCC (Low Temperature Co-fired Ceramic) material seems promising to have better second level reliability due to it´s CTE being closer to FR4 material. Since this material is about 3 times stiffer than organic low-CTE core material, its effect on low-k reliability and bump fatigue needs to be investigated. This paper presents the comparison of LTCC ceramics and low-CTE organic materials for 3 different cases; (1) a logic die that is mounted on a large silicon interposer with Cu through silicon via through 45um pitch micro bumps. The silicon interposer is 100um thick, and is mounted on a 42.5×42.5mm substrate through 180um pitch C4 bumps, (2) The same logic die on a 50um thick TSV interposer with more aggressive bump and TSV pitch, (3) a smaller logic die flip-chipped on a 27×27mm package (no interposer). 3D thermal-mechanical simulation have been performed to compare the effect of LTCC ceramics material on TSV interposer stress, low-k delamination and fatigue life of micro bumps and C4 bumps. In addition, the packaged samples for case 3 have been subjected to thermal cycling to validate simulation results and effectiveness of LTCC material on die stress and bump fatigue.