Research on the PWM Waveform Compensation Algorism

Author

Nianqiang, Li ; Lu, Zhang ; Changzhi, Wei

Author_Institution

Jinan Univ., Jinan

fYear

2007

Abstract

In this paper, dynamic PWM waveform compensation algorithm is introduced in detail. The PWM waveform is generated with FPGA (field programmable gate array). The hardware is based on the Altera´s FPGA-Cyclone-II EP2C8 and its configuration device-EPC2LC20. The software is developed under the Altera´s development environment qartusII 6.0 and NIOS II CPU in FPGA. In this paper,PID algorithm is adopted. Simulation and experiments validate the system. The THD of the output voltage drops from 2.0% to 5%o . During the adding and removal of the load, the rate of output signal fluctuation is less than 0.5% and the adjusted time is less than 2 ms.high-power supply,

Keywords

field programmable gate arrays; pulse width modulation; signal processing equipment; waveform generators; Altera Cyclone-II EP2C8; EPC2LC20 configuration device; FPGA; NIOS II; PID algorithm; PWM waveform compensation; QartusII 6.0; field programmable gate array; Central Processing Unit; Circuits; Communication system control; Feedback; Field programmable gate arrays; Hardware; Instruments; Insulated gate bipolar transistors; Power generation; Pulse width modulation; NIOS II FPGA-based Dynamic Waveform compensation; PID algorism; PWM wave; Realtime adjusting; digital power supply;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Measurement and Instruments, 2007. ICEMI '07. 8th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4244-1136-8

Electronic_ISBN

978-1-4244-1136-8

Type

conf

DOI

10.1109/ICEMI.2007.4350856

Filename

4350856