Test Technology and Debouncing Circuit Design of Digitally Controlled Potentiometer

The digitally controlled potentiometer is a kind of new style electronic device, which have good development foreground. It can replace the mechanical potentiometer in many fields. The MCU can program the digitally controlled potentiometer through interface circuit to compose programmable analogy device. The paper provides the principle of the test circuit of the digitally controlled potentiometer, and expatiates the test methods and test data and note items of the test technology. The test parameters include integral nonlinearity error, differential nonlinearity error, the wiper resistance and wiper capacitance. When using the key stroking digitally controlled potentiometer, the debouncing circuit has to be used to avoid the misoperation caused by the bounce. The misoperation will cause that the setup value of the potentiometer is not accordant with the times of key pressing. Analyzing the waveform of the bounce, we find out that the character of the waveform is a kind of high frequency noise. They are sharp pulse or wider pulse, and have some randomness. In the close process, the amplitude of the voltage of the pulses lower and lower, in the end the amplitude reached low level. In the open process the amplitude of the voltage of the pulses higher and higher, in the end the amplitude reached high level. The paper expatiates the debouncing circuit design of the key press digitally controlled potentiometer. The first project is using filter and time delay to avoid the bouncing time. The second project is using software and bouncing judge methods the two projects can be selected in need. The theory and the test methods are all verified and of practical value.