DocumentCode
1728390
Title
Load miss performance analysis methodology using the PowerPC 604 performance monitor for OLTP workloads
Author
Welbon, E.H. ; Moore, R.S. ; Levine, F.E. ; Roth, C.P.
Author_Institution
IBM Corp., Austin, TX, USA
fYear
1996
Firstpage
111
Lastpage
116
Abstract
This paper describes a methodology via which the PowerPC 604 Micro Processor (abbreviated 604 in the remainder of this paper) performance monitor can be used to examine and contrast the effects of hardware variations on system performance. We present performance measurement data and analysis of an On-Line Transaction Processing (OLTP) workload, which are derived via repeated runs using a database software engine with several different memory and processor speeds. We show for our workload that variations in the easily measured load miss sojourn can be used to approximate the valuable but difficult to measure composite cache miss penalty. We also show interesting variations in bus utilization versus bus to processor clock ratios.
Keywords
microprocessor chips; performance evaluation; transaction processing; OLTP workloads; PowerPC 604 performance monitor; database software engine; load miss performance analysis methodology; load miss sojourn; online transaction processing; Clocks; Data analysis; Engines; Hardware; Measurement; Monitoring; Performance analysis; Software performance; System performance; Transaction databases;
fLanguage
English
Publisher
ieee
Conference_Titel
Compcon '96. 'Technologies for the Information Superhighway' Digest of Papers
Conference_Location
Santa Clara, CA, USA
ISSN
1063-6390
Print_ISBN
0-8186-7414-8
Type
conf
DOI
10.1109/CMPCON.1996.501756
Filename
501756
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