A new opportunity by low power CMOS decision circuit for optical communications and its comparison with new GaAs and HBT implementation

The design specifications considering low-power and high-speed are presented. Several decision circuits used for an optical communication receiver system, are designed and simulated using the circuit simulation tool AIM-SPICE, based on extracted process parameters using an in-house characterization and modeling tool named CMLEE. The several sampled circuits are implemented in 2×4 emitter-area HBT, 0.5 μm MESFET and compatible 0.1 μm CMOS technologies. All the designed circuits are carefully simulated for the waveform at the output node and power consumption in the circuit. All waveform simulations showed good performance at 10 Gbps level. It is observed that 0.1 μm CMOS of current mainstream electronic systems shows more than 10 GHz level operation, opening an opportunity for high frequency use as long as deep sub-μm technology compromises maturity and cost in reality. In terms of power consumption, the sub-0.5 μm GaAs MESFET design was 4.2 mW and the best choice for the same 10 GHz speed performance, compared to 60 mW by the 0.1 μm CMOS circuit design