The performance and PowerPC Platform specification implementation of the MPC106 chipset

The MPC106 provides a PowerPC Platform specification compliant bridge between the family of PowerPC Microprocessors and the PCI bus. The MPC106´s PCI support will allow system designers to rapidly design systems using peripherals already designed for PCI and the other standard interfaces available in the personal computer hardware environment. The MPC106 also integrates secondary cache control and a high-performance memory controller which supports various types of DRAM and ROM. The MPC106 is the second of a family of Motorola products that provide system level support for industry standard interfaces to be used with PowerPC microprocessors. This paper describes the MPC106, its performance, and its implementation of the PowerPC Platform specification. The PowerPC Platform specification is formally known as the Common Hardware Reference Platform or CHRP.