Modeling characterization and reliability analysis of a power system in package

A power system in package (SiP), which has high-side (HS) and low-side (LS) MOSFETs, and a driver IC, is investigated in this paper. To reduce cost and improve time to market, electrical, thermal and mechanical virtual prototyping are applied to investigate the electrical, thermal and reliability performance of the power SiP. Totally 8 DoE legs are designed to study the impact of bond wire diameter, bond wire numbers, and die size of LS and HS MOSFETs. In order to minimize the package effects on RDson and switching noise, the resistance and inductance for all DoE models are examined, and the efficiencies for all models are calculated. The thermal characterization of Theta_ja according to the JEDEC standards is conducted with 3 types of thermal test boards. Mechanical and reliability simulation including mold cure and reflow simulation with/without moisture are conducted to check if die cracking, or delamination might occur under thermal stress. The moisture related reliability model is improved to calculate the equivalent CTE of the mold compound according to its moisture concentration distribution contour, and the simulation results are compared and discussed with those by using the original method.