Development of a simulation Environment for Vehicular communications, implementation of FEC coding chain in Xilinx FPGA based on IEEE 802.11p standard

This work presents the performance analysis and optimization of the IEEE 802.11p Physical layer and the implementation of the forward error correction (FEC) coding chain on Xilinx FPGA hardware. A MATLAB simulation is carried out in order to analyze baseband processing of the transceiver. IEEE 802.11p wireless access in the vehicular environment defines modifications to IEEE 802.11 to support intelligent transportation systems applications. Performance analysis of physical layer model has been estimated into different propagation conditions (AWGN, Ricean and Rayleigh fading). Two different coding schemes and a different value of guard interval has been employing in the model in order to optimize its performance. The coding chain in the transmitter with and without the two coding schemes has been implemented in a FPGA from Xilinx using the System Generator tool-flow for fast prototyping.