Title :
FPGA-based image processing system for Quality Control and Palletization applications
Author :
Ashir, Abubakar M. ; Ata, Atef A. ; Salman, M.S.
Author_Institution :
Dept. of Electr. & Electron. Eng., Mevlana Univ., Konya, Turkey
Abstract :
This paper proposes a new approach for solving well-known industrial automation problems such as Quality Control and Palletization (QCP). An intelligent four-bar mechanism has been designed as a mechanical palletizer. It has been modelled as a singular quadrilateral mechanism whose intelligence is sourced from an image processing algorithm targeted for Field Programmable Gate Array (FPGA) real-time processing system. In this proposed approach the algorithms are implemented using MATLAB and Simulink packages. The critical system blocks of the Simulink model are the serial pixel data generator and the thresholder whose functions is to compute threshold value of all pixels for binarization. All the Simulink system blocks have been designed based on the proposed FPGA architecture and mapped onto the Configurable Logic Blocks of the FPGA. The hardware description language (HDL) codes generated from the Simulink model show no behavioral deviation from the original MATLAB version of the algorithm. The recognition rate results are high and the whole system is very fast at 50 MHz clock frequency.
Keywords :
control engineering computing; field programmable gate arrays; hardware description languages; image processing; industrial robots; palletising; quality control; FPGA architecture; FPGA configurable logic blocks; FPGA-based image processing system; MATLAB; QCP applications; Simulink model; Simulink system blocks; binarization; field programmable gate array real-time processing system; frequency 50 MHz; hardware description language codes; industrial automation problems; intelligent four-bar mechanism; mechanical palletizer; quality control and palletization applications; serial pixel data generator; singular quadrilateral mechanism; thresholder; Algorithm design and analysis; Computer architecture; Field programmable gate arrays; Object recognition; Robots; Shift registers; Software packages; BLOB; Edge Detection; FPGA; Mechanical Palletizer; Robotics and Automation;
Conference_Titel :
Autonomous Robot Systems and Competitions (ICARSC), 2014 IEEE International Conference on
Conference_Location :
Espinho
DOI :
10.1109/ICARSC.2014.6849800